#include <config.h>
#include <arch/arm.h>
#include <arch/cpu/soc/mach/setup.inc>

.global _start
_start:
    /* set the cpu to SVC32 mode and disable IRQ FIQ */
    msr cpsr_c, #(ARM_MODE_SVC | ARM_INT_MASK)

	MACHINE_SETUP2

clear_bss:
	ldr r0, =__bss_start
	ldr r1, =__bss_end
	mov r2, #0
clbss_l:
	cmp r0, r1
	strne r2, [r0]
	addne r0, r0, #4
	bne clbss_l

	@ switch to IRQ mode
	mrs r0, cpsr
	eor r0, r0, #(ARM_MODE_IRQ ^ ARM_MODE_SVC)
	msr cpsr_c, r0	

	@ set sp_irq
	ldr sp, =0x31100000	/* 只是测试 */
	
	@ switch to SVC mode
	mrs r0, cpsr
	eor r0, r0, #(ARM_MODE_IRQ ^ ARM_MODE_SVC)
	msr cpsr_c, r0	

	/* sp应在重定位mboot之后再确定，现在只是测试 */
	ldr sp, =0x31000000

	b start_kernel

